In this PR, example array_axis_vcs is enhanced with some ideas from https://github.com/ghdl/ghdl-cosim/tree/master/vhpidirect/arrays/matrices/vunit_axis_vcs (see also https://ghdl.github.io/ghdl-cosim/vhpidirect/examples/arrays.html#array-and-axi4-stream-verification-components).

On the one hand, PSL checks are used instead of plain assertions (contributed by @tmeissner). On the other hand, a file is used to wrap the UUT and the verification components, so that the testbench is cleaner.