A small, light weight, RISC CPU soft core
- Updated Dec 8, 2025
- Verilog
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Here are 8 public repositories matching this topic...
An Open Source configuration of the Arty platform
- Updated Jan 17, 2024
- Verilog
CMod-S6 SoC
- Updated Jan 6, 2018
- Verilog
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
- Updated Oct 27, 2022
- Verilog
A ZipCPU SoC for the Nexys Video board supporting video functionality
- Updated Nov 13, 2024
- Verilog
The ZipCPU blog
- Updated Dec 17, 2025
- HTML
A System on a Chip Implementation for the XuLA2-LX25 board
- Updated Dec 13, 2018
- Verilog
A small, light weight, RISC CPU soft core
- Updated Sep 12, 2017
- C++
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