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[mips patch RFA] fix mips INSN_ISA*.

cgd@broadcom.com cgd@broadcom.com
Fri Jan 3 01:44:00 GMT 2003 
So, way back when (December 2000), the MIPS INSN_ISA* constants were
changed as described in:

	http://sources.redhat.com/ml/binutils/2000-10/msg00191.html

They went from being numbers in the bottom 4 bits of the field to bit
masks in ... more.  The new constants were:

! #define INSN_ISA1                 0x00000010
! #define INSN_ISA2                 0x00000020
! #define INSN_ISA3                 0x00000040
! #define INSN_ISA4                 0x00000080
! #define INSN_ISA5                 0x00000100
! #define INSN_ISA32                0x00000200


Later a INSN_ISA_MASK constant was added:

	http://sources.redhat.com/ml/binutils/2001-05/msg00233.html

as the low 16 bits, then trimmed to be the low 12:

	http://sources.redhat.com/ml/binutils/2001-08/msg00001.html


Yet, the INSN_ISA* constants still did not use the low 4 bits.


Really, I have no idea why this was, other than perhaps as an aid to
help me debug possible problems in the initial conversion of those
constants to be a bit mask.

Anyway, the following patch moves these constants down by 4 bits
(leaving the same 12 bits reserved for their use).  I suppose future
additions could be placed in the low 4 bits, but that seems, well, at
best strange.

No negative side-effects that I can think of (this is entirely
internal to the assembler and disassembler code), and this change
causes no new failures w/ my normal (large) set of MIPS targets.

This seems fairly obvious, but it is also sufficiently strange (and I
don't recall my motivation) so I thought i'd run it up the flagpole
for approval.  8-)



chris
--
[ include/opcode/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Fix missing space in comment.
	(INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
	(INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
	by four bits.

Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.33
diff -u -p -r1.33 mips.h
--- include/opcode/mips.h	2 Jan 2003 20:03:09 -0000	1.33
+++ include/opcode/mips.h	3 Jan 2003 01:42:08 -0000
@@ -373,18 +373,18 @@ struct mips_opcode
 
 /* Masks used to mark instructions to indicate which MIPS ISA level
    they were introduced in.  ISAs, as defined below, are logical
-   ORs of these bits, indicatingthat they support the instructions
+   ORs of these bits, indicating that they support the instructions
    defined at the given level.  */
 
 #define INSN_ISA_MASK		  0x00000fff
-#define INSN_ISA1                 0x00000010
-#define INSN_ISA2                 0x00000020
-#define INSN_ISA3                 0x00000040
-#define INSN_ISA4                 0x00000080
-#define INSN_ISA5                 0x00000100
-#define INSN_ISA32                0x00000200
-#define INSN_ISA64                0x00000400
-#define INSN_ISA32R2              0x00000800
+#define INSN_ISA1                 0x00000001
+#define INSN_ISA2                 0x00000002
+#define INSN_ISA3                 0x00000004
+#define INSN_ISA4                 0x00000008
+#define INSN_ISA5                 0x00000010
+#define INSN_ISA32                0x00000020
+#define INSN_ISA64                0x00000040
+#define INSN_ISA32R2              0x00000080
 
 /* Masks used for MIPS-defined ASEs.  */
 #define INSN_ASE_MASK		  0x0000f000
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