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Handle normal mode for H8/300H and H8S

Shrinivas Atre ShrinivasA@KPITCummins.com
Mon Oct 13 07:19:00 GMT 2003 
Hi,

The attached patch fixes few of H8/300 Normal mode problems

1. Fix the size of entries in .vectors section.
2. Fixes the address size in bfd_arch_info structures for normal mode
3. Accepts both 16 bit and 32 bit register names as pointer registers for Normal mode. 
The opcode contains 32 bit register as required by the architecture. (The Renesas assembler also
accepts 16 bit register names for pointer register.)

Regards,
Shrinivas

bfd/Changelog - 

2003-10-13  Shrinivas Atre  <shrinivasa@KPITCummins.com>
      * bfd/coff-h8300.c (funcvec_hash_newfunc): Handle normal mode
      (h8300_reloc16_extra_cases) : Ditto
      (h8300_bfd_link_add_symbols) : Ditto

2003-10-13 Dhananjay Deshpande <dhananjayd@kpitcummins.com> 
	* cpu-h8300.c (h8300sxn_info_struct): Correct address size
	(h8300sn_info_struct): Likewise
	(h8300hn_info_struct): Likewise

gas/Changelog - 
	* config/tc-h8300.c (PSIZE): Correct for Normal mode
	(get_operand): Accept both 16 bit 32 bit registers as pointer registers.
	(fix_operand_size): Make default address size 16 for Normal mode

=======================================================================================
--- bfd/coff-h8300.c.old	Mon Oct 13 11:51:13 2003
+++ bfd/coff-h8300.c	Mon Oct 13 11:51:15 2003
@@ -154,7 +154,9 @@ funcvec_hash_newfunc (struct bfd_hash_en
   /* Bump the offset at which we store entries in the function
      vector.  We'd like to bump up the size of the vectors section,
      but it's not easily available here.  */
-  if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
+  if (bfd_get_mach (table->abfd) == bfd_mach_h8300
+    || bfd_get_mach (table->abfd) == bfd_mach_h8300hn
+    || bfd_get_mach (table->abfd) == bfd_mach_h8300sn)
     table->offset += 2;
   else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
 	   || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
@@ -1124,7 +1126,9 @@ h8300_reloc16_extra_cases (bfd *abfd, st
 	src_address++;
 
 	/* Now create an entry in the function vector itself.  */
-	if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
+	if (bfd_get_mach (input_section->owner) == bfd_mach_h8300
+	  || bfd_get_mach (input_section->owner) == bfd_mach_h8300hn
+	  || bfd_get_mach (input_section->owner) == bfd_mach_h8300sn)
 	  bfd_put_16 (abfd,
 		      bfd_coff_reloc16_get_value (reloc,
 						  link_info,
@@ -1304,7 +1308,9 @@ h8300_bfd_link_add_symbols (bfd *abfd, s
 
 		  /* Bump the size of the vectors section.  Each vector
 		     takes 2 bytes on the h8300 and 4 bytes on the h8300h.  */
-		  if (bfd_get_mach (abfd) == bfd_mach_h8300)
+		  if (bfd_get_mach (abfd) == bfd_mach_h8300
+		    || bfd_get_mach (abfd) == bfd_mach_h8300hn
+		    || bfd_get_mach (abfd) == bfd_mach_h8300sn)
 		    htab->vectors_sec->_raw_size += 2;
 		  else if (bfd_get_mach (abfd) == bfd_mach_h8300h
 			   || bfd_get_mach (abfd) == bfd_mach_h8300s)

=======================================================================================
--- bfd/cpu-h8300.c.old	Mon Sep 29 12:39:52 2003
+++ bfd/cpu-h8300.c	Mon Sep 29 12:40:31 2003
@@ -111,7 +111,7 @@ compatible (const bfd_arch_info_type *in
 static const bfd_arch_info_type h8300sxn_info_struct =
 {
   32,				/* 32 bits in a word */
-  32,				/* 32 bits in an address */
+  16,				/* 16 bits in an address */
   8,				/* 8 bits in a byte */
   bfd_arch_h8300,
   bfd_mach_h8300sxn,
@@ -143,7 +143,7 @@ static const bfd_arch_info_type h8300sx_
 static const bfd_arch_info_type h8300sn_info_struct =
 {
   32,				/* 32 bits in a word.  */
-  32,				/* 32 bits in an address.  */
+  16,				/* 16 bits in an address.  */
   8,				/* 8 bits in a byte.  */
   bfd_arch_h8300,
   bfd_mach_h8300sn,
@@ -160,7 +160,7 @@ static const bfd_arch_info_type h8300sn_
 static const bfd_arch_info_type h8300hn_info_struct =
 {
   32,				/* 32 bits in a word.  */
-  32,				/* 32 bits in an address.  */
+  16,				/* 16 bits in an address.  */
   8,				/* 8 bits in a byte.  */
   bfd_arch_h8300,
   bfd_mach_h8300hn,

=======================================================================================
--- gas/config/tc-h8300.c.old	Mon Sep 29 12:39:35 2003
+++ gas/config/tc-h8300.c	Mon Oct 13 11:29:11 2003
@@ -58,7 +58,7 @@ int Smode;
 int Nmode;
 int SXmode;
 
-#define PSIZE (Hmode ? L_32 : L_16)
+#define PSIZE (Hmode && !Nmode ? L_32 : L_16)
 
 int bsize = L_8;		/* Default branch displacement.  */
 
@@ -719,7 +719,9 @@ get_operand (ptr, op, direction)
 	    }
 
 	  if ((mode & SIZE) != PSIZE)
-	    as_bad (_("Wrong size pointer register for architecture."));
+	    /* For Normal mode accept 16 bit and 32 bit pointer registers */
+	    if (!Nmode || ((mode & SIZE) != L_32))
+	      as_bad (_("Wrong size pointer register for architecture."));
 
 	  op->mode = src[0] == '-' ? RDPREDEC : RDPREINC;
 	  op->reg = num;
@@ -829,7 +831,9 @@ get_operand (ptr, op, direction)
 	  if (*src == '+' || *src == '-')
 	    {
 	      if ((mode & SIZE) != PSIZE)
-		as_bad (_("Wrong size pointer register for architecture."));
+	        /* For Normal mode accept 16 bit and 32 bit pointer registers */
+	        if (!Nmode || ((mode & SIZE) != L_32))
+	          as_bad (_("Wrong size pointer register for architecture."));
 	      op->mode = *src == '+' ? RSPOSTINC : RSPOSTDEC;
 	      op->reg = num;
 	      src++;
@@ -837,7 +841,9 @@ get_operand (ptr, op, direction)
 	      return;
 	    }
 	  if ((mode & SIZE) != PSIZE)
-	    as_bad (_("Wrong size pointer register for architecture."));
+	    /* For Normal mode accept 16 bit and 32 bit pointer registers */
+	    if (!Nmode || ((mode & SIZE) != L_32))
+	      as_bad (_("Wrong size pointer register for architecture."));
 
 	  op->mode = direction | IND | PSIZE;
 	  op->reg = num;
@@ -1855,6 +1861,7 @@ fix_operand_size (operand, size)
 	   is safe.  get_specific() will relax L_24 into L_32 where
 	   necessary.  */
 	if (Hmode
+	    && !Nmode 
 	    && (operand->exp.X_add_number < -32768
 		|| operand->exp.X_add_number > 32767
 		|| operand->exp.X_add_symbol != 0

=======================================================================================
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