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PATCH: Support 64bit BFD for m68k and xtensa

H. J. Lu hjl@lucon.org
Sat Apr 9 20:48:00 GMT 2005 
m68k and xtensa are failed to build with --enable-64-bit-bfd. This
patch fixes it.


H.J.
----
2005-04-09  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-m68k.c (get_num): Support 64bit BFD.
	* config/tc-xtensa.c (xg_translate_sysreg_op): Likewise.
	(xtensa_translate_old_userreg_ops): Likewise.
	(xtensa_find_unaligned_branch_targets): Likewise.
	(xtensa_find_unaligned_loops): Likewise.
	(xtensa_fix_close_loop_end_frags): Likewise.
	(relax_frag_add_nop): Likewise.
	(xtensa_move_literals): Likewise.

--- gas/config/tc-m68k.c.error	2005-03-21 09:13:23.000000000 -0800
+++ gas/config/tc-m68k.c	2005-04-09 12:12:10.000000000 -0700
@@ -5292,7 +5292,7 @@ get_num (struct m68k_exp *exp, int ok)
 	  subs (exp) = 0;
 	  offs (exp) = (ok == 10) ? 1 : 0;
 	  as_warn (_("Can't deal with expression; defaulting to %ld"),
-		   offs (exp));
+		   (long) offs (exp));
 	}
     }
   else
@@ -5304,7 +5304,7 @@ get_num (struct m68k_exp *exp, int ok)
 	  subs (exp) = 0;
 	  offs (exp) = (ok == 10) ? 1 : 0;
 	  as_warn (_("Can't deal with expression; defaulting to %ld"),
-		   offs (exp));
+		   (long) offs (exp));
 	}
     }
 
--- gas/config/tc-xtensa.c.error	2005-04-08 15:29:40.000000000 -0700
+++ gas/config/tc-xtensa.c	2005-04-09 13:33:43.000000000 -0700
@@ -2247,7 +2247,7 @@ xg_translate_sysreg_op (char **popname, 
       if (sr == XTENSA_UNDEFINED)
 	{
 	  as_bad (_("invalid register number (%ld) for '%s' instruction"),
-		  val, opname);
+		  (long) val, opname);
 	  return -1;
 	}
     }
@@ -2316,7 +2316,7 @@ xtensa_translate_old_userreg_ops (char *
       if (sr == XTENSA_UNDEFINED)
 	{
 	  as_bad (_("invalid register number (%ld) for '%s'"),
-		  val, opname);
+		  (long) val, opname);
 	  return -1;
 	}
     }
@@ -4882,7 +4882,7 @@ xtensa_find_unaligned_branch_targets (bf
 	      if (frag_addr + op_size > branch_align)
 		as_warn_where (frag->fr_file, frag->fr_line,
 			       _("unaligned branch target: %d bytes at 0x%lx"),
-			       op_size, frag->fr_address);
+			       op_size, (long) frag->fr_address);
 	    }
 	  frag = frag->fr_next;
 	}
@@ -4921,7 +4921,7 @@ xtensa_find_unaligned_loops (bfd *abfd A
 	      if (frag_addr + op_size > xtensa_fetch_width)
 		as_warn_where (frag->fr_file, frag->fr_line,
 			       _("unaligned loop: %d bytes at 0x%lx"),
-			       op_size, frag->fr_address);
+			       op_size, (long) frag->fr_address);
 	    }
 	  frag = frag->fr_next;
 	}
@@ -7462,7 +7462,7 @@ xtensa_fix_close_loop_end_frags (void)
 			  
 			  if (fragP->fr_var < length)
 			    as_fatal (_("fr_var %lu < length %d"),
-				      fragP->fr_var, length);
+				      (long) fragP->fr_var, length);
 			  else
 			    {
 			      assemble_nop (length,
@@ -8410,7 +8410,8 @@ relax_frag_add_nop (fragS *fragP)
 
   if (fragP->fr_var < length)
     {
-      as_fatal (_("fr_var (%ld) < length (%d)"), fragP->fr_var, length);
+      as_fatal (_("fr_var (%ld) < length (%d)"),
+		(long) fragP->fr_var, length);
       return 0;
     }
 
@@ -9872,14 +9873,14 @@ xtensa_move_literals (void)
 	      /* Note that we set this fr_var to be a fix
 		 chain when we created the literal pool location
 		 as RELAX_LITERAL_POOL_BEGIN.  */
-	      frchain_to = (frchainS *) literal_pool->fr_var;
+	      frchain_to = (frchainS *) (unsigned long) literal_pool->fr_var;
 	    }
 	  insert_after = literal_pool;
 
 	  while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END)
 	    insert_after = insert_after->fr_next;
 
-	  dest_seg = (segT) insert_after->fr_next->fr_var;
+	  dest_seg = (segT) (unsigned long) insert_after->fr_next->fr_var;
 
 	  *frag_splice = next_frag;
 	  search_frag->fr_next = insert_after->fr_next;
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