Julian Brown julian@codesourcery.com
Wed Jan 3 17:07:00 GMT 2007

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Hi,

This patch fixes the encoding for the ARM Neon extension's vshl/vqshl 
instructions. The order of registers for these instructions is:

   V{Q}SHL rD, rM, rN

Rather than the previously-used:

   V{Q}SHL rD, rN, rM

This is (obviously) a silent code-generation error. Both the assembler 
and disassembler were at fault.

Tested with no regressions with cross to arm-none-eabi. OK for mainline?

Cheers,

Julian

ChangeLogs

     gas/
     * config/tc-arm.c (do_neon_shl_imm): Swap rN, rM.
     (do_neon_qshl_imm): Likewise.
     (do_neon_rshl): New function. Handle rounding variants of
     v{q}shl-by-register.
     (insns): Use do_neon_rshl for vrshl, vqrshl.

     gas/testsuite/
     * gas/arm/neon-omit.d: Fix expected encodings for vshl, vqshl.

     opcodes/
     * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
     vqrshl instructions.
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