[PATCH ARM]: Architectural Extensions (Matthew Gretton-Dann or Richard Earnshaw)
David Fernandez
david.fernandez.work@googlemail.com
Tue Dec 18 17:19:00 GMT 2012
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Tue Dec 18 17:19:00 GMT 2012
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On Tue, Dec 18, 2012 at 4:08 PM, Richard Earnshaw <rearnsha@arm.com> wrote: > On 18/12/12 15:30, David Fernandez wrote: >> >> Hi Richard, >> >> Great, thanks for the info. That will keep me going. I'll look into >> .inst, as I was using just a .word to define it for now. >> >> Just as a comment to the whole thing, AFAIK both Cortex-Rn and >> Cortex-An have in essence the same architecture, i.e. same instruction >> set, same possible extensions, etc. The difference is that while >> extensions like virt and sec are standard in Cortex-An, they are >> optional in Cortex-Rn. >> >> So I would suggest, that both armv7-r and arm-v7a should have access >> to the same extensions, just that armv7-r will have most disabled by >> default, while armv7-a would have some enabled by default. >> >> Also, the banked registers instructions are not part of any extension, >> and should be present all time. It is a bit weird that you don't have >> them unless you enable the virt extension. >> > > I'm not sure I understand what else you think is missing. > > The file > > .arch armv7-r > .thumb > .syntax unified > srsia sp!, #4 > rfefd sp! > > assembles without error for me. > > Perhaps you can provide a test-case. > > R. > > Something like: .arch armv7-r .syntax unified .thumb mrs r0, sp_usr bx lr Complains, saying that this architecture does not support banked registers. I have to use .arch armv7-a and .arch_extension virt to make it work, but it should work in armv7-r and without the need for virtualization extensions. R
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