Nick Clifton - Re: [AArch64][PATCH 3/3] Add floating-point FP16 instructions

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gas/testsuite/
2015-11-24  Matthew Wahab  <matthew.wahab@arm.com>

     * gas/aarch64/float-fp16.d: New.
     * gas/aarch64/float-fp16.s: New.

opcodes/
2015-11-24  Matthew Wahab  <matthew.wahab@arm.com>

     * aarch64-asm-2.c: Regenerate.
     * aarch64-dis-2.c: Regenerate.
     * aarch64-opc-2.c: Regenerate.
     * aarch64-tbl.h (QL_FIX2FP_H, QL_FP2FIX_H): New.
     (QL_INT2FP_H, QL_FP2INT_H): New.
     (QL_FP2_H, QL_FP3_H, QL_FP4_H): New
     (QL_DST_H): New.
     (QL_FCCMP_H): New.
     (aarch64_opcode_table): Add 16-bit variants of scvt, ucvtf,
     fcvtzs, fcvtzu, fcvtns, fcvtnu, scvtf, ucvtf, fcvtas, fcvtau,
     fmov, fcvtpos, fcvtpu, fcvtms, fcvtmu, fcvtzs, fcvtzu, fccmp,
     fccmpe, fcmp, fcmpe, fabs, fneg, fsqrt, frintn, frintp, frintm,
     frintz, frinta, frintx, frinti, fmul, fdiv, fadd, fsub, fmax,
     fmin, fmaxnm, fminnm, fnmul, fmadd, fmsub, fnmadd, fnmsub and
     fcsel.