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[PATCH, BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Extension

Sudakshina Das Sudi.Das@arm.com
Thu Nov 8 10:35:00 GMT 2018 
On 02/11/18 16:09, Sudakshina Das wrote:
> Hi Richard
> 
> On 30/10/18 09:53, Richard Earnshaw (lists) wrote:
>> On 09/10/2018 18:24, Sudakshina Das wrote:
>>> Hi
>>>
>>> This patch is part of the patch series to add support for ARMv8.5-A
>>> Memory Tagging Extensions.
>>> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) 
>>>
>>> Memory Tagging Extension (MTE) is an optional extension to
>>> ARMv8.5-A and is enabled using the +memtag command line option.
>>>
>>> This patch add support to the Tag setting instructions from
>>> MTE which consists of the following instructions:
>>> - STG [<Xn|SP>, #<simm>]
>>> - STG [<Xn|SP>, #<simm>]!
>>> - STG [<Xn|SP>], #<simm>
>>> - STZG [<Xn|SP>, #<simm>]
>>> - STZG [<Xn|SP>, #<simm>]!
>>> - STZG [<Xn|SP>], #<simm>
>>> - ST2G [<Xn|SP>, #<simm>]
>>> - ST2G [<Xn|SP>, #<simm>]!
>>> - ST2G [<Xn|SP>], #<simm>
>>> - STZ2G [<Xn|SP>, #<simm>]
>>> - STZ2G [<Xn|SP>, #<simm>]!
>>> - STZ2G [<Xn|SP>], #<simm>
>>> - STGP <Xt>, <Xt2>, [<Xn|SP>, #<imm>]
>>> - STGP <Xt>, <Xt2>, [<Xn|SP>, #<imm>]!
>>> - STGP <Xt>, <Xt2>, [<Xn|SP>], #<imm>
>>>
>>> where
>>> <Xn|SP> : Is the 64-bit GPR or Stack pointer.
>>> <simm> : Is the optional signed immediate offset, a multiple of 16
>>> in the range -4096 to 4080, defaulting to 0.
>>>
>>> Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
>>> Added test.
>>>
>>> Is this ok for trunk?
>>>
>>> Thanks
>>> Sudi
>>>
>>> *** include/ChangeLog ***
>>>
>>> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>>>
>>>     * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
>>>     and AARCH64_OPND_ADDR_SIMM13.
>>>     (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
>>>
>>> *** opcodes/ChangeLog ***
>>>
>>> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>>>
>>>     * aarch64-opc.c (aarch64_opnd_qualifiers): Add new data
>>>     for AARCH64_OPND_QLF_imm_tag.
>>>     (operand_general_constraint_met_p): Add case for
>>>     AARCH64_OPND_ADDR_SIMM11 and AARCH64_OPND_ADDR_SIMM13.
>>>     (aarch64_print_operand): Likewise.
>>>     * aarch64-tbl.h (QL_LDST_AT, QL_STGP): New.
>>>     (aarch64_opcode_table): Add stg, stzg, st2g, stz2g and stgp
>>>     for both offset and pre/post indexed versions.
>>>     (AARCH64_OPERANDS): Define ADDR_SIMM11 and ADDR_SIMM13.
>>>     * aarch64-asm-2.c: Regenarated.
>>>     * aarch64-dis-2.c: Regenerated.
>>>     * aarch64-opc-2.c: Regenerated.
>>>
>>> *** gas/ChangeLog ***
>>>
>>> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>>>
>>>     * config/tc-aarch64.c (parse_operands): Add switch case for
>>>     AARCH64_OPND_ADDR_SIMM11 and AARCH64_OPND_ADDR_SIMM13.
>>>     (fix_insn): Likewise.
>>>     * testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for stg,
>>>     st2g, stzg, stz2g and stgp.
>>>     * testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.
>>>
>>
>> aarch64-opc.c
>>
>> Same issues as earlier patch re independent if clauses and mte/memtag.
>>
>> Otherwise OK.
>>
>> R.
>>
> *** include/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
>      * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
>      and AARCH64_OPND_ADDR_SIMM13.
>      (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
> 
> *** opcodes/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
>      * aarch64-opc.c (aarch64_opnd_qualifiers): Add new data
>      for AARCH64_OPND_QLF_imm_tag.
>      (operand_general_constraint_met_p): Add case for
>      AARCH64_OPND_ADDR_SIMM11 and AARCH64_OPND_ADDR_SIMM13.
>      (aarch64_print_operand): Likewise.
>      * aarch64-tbl.h (QL_LDST_AT, QL_STGP): New.
>      (aarch64_opcode_table): Add stg, stzg, st2g, stz2g and stgp
>      for both offset and pre/post indexed versions.
>      (AARCH64_OPERANDS): Define ADDR_SIMM11 and ADDR_SIMM13.
>      * aarch64-asm-2.c: Regenerated.
>      * aarch64-dis-2.c: Regenerated.
>      * aarch64-opc-2.c: Regenerated.
> 
> *** gas/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
>      * config/tc-aarch64.c (parse_operands): Add switch case for
>      AARCH64_OPND_ADDR_SIMM11 and AARCH64_OPND_ADDR_SIMM13.
>      (fix_insn): Likewise.
>      (warn_unpredictable_ldst): Exempt STGP.
>      * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for stg,
>      st2g, stzg, stz2g and stgp.
>      * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
>      * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
>      * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
> 
New patch. Changelog still applies.

Sudi

> Thanks
> Sudi
> 
> 


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