April 2019 Archives by author

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Starting: Mon Apr 1 03:05:00 GMT 2019
Ending: Tue Apr 30 22:58:00 GMT 2019
Messages: 287

• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI   Andre Vieira (lists)
• [PATCH, GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real for fallback branch   Andre Vieira (lists)
• [PATCH, binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct arm_it   Andre Vieira (lists)
• [PATCH, binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM_BF16   Andre Vieira (lists)
• [PATCH, binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18   Andre Vieira (lists)
• [PATCH, binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_BF12   Andre Vieira (lists)
• [PATCH, binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 13/16] Add support for CLRM   Andre Vieira (lists)
• [PATCH, opcodes, ARM, 14/16] Add mode availability to coprocessor table entries   Andre Vieira (lists)
• [PATCH, binutils, ARM, 16/16] Add support to VLDR and VSTR of system registers   Andre Vieira (lists)
• [PATCH, binutils, ARM, 15/16] Add support for VSCCLRM   Andre Vieira (lists)
• [PATCH, binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [PATCH, binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline   Andre Vieira (lists)
• [arm] Too strict linker assert?   Richard Earnshaw (lists)
• [PATCH 00/19] libctf, and CTF support for objdump and readelf   Nick Alcock
• [PATCH 09/19] libctf: opening   Nick Alcock
• [PATCH 10/19] libctf: ELF file opening   Nick Alcock
• [PATCH 11/19] libctf: core type lookup   Nick Alcock
• [PATCH 12/19] libctf: lookups by name and symbol   Nick Alcock
• [PATCH 13/19] libctf: type copying   Nick Alcock
• [PATCH 14/19] libctf: library version enforcement   Nick Alcock
• [PATCH 15/19] libctf: mmappable archives   Nick Alcock
• [PATCH 01/19] include: new header ctf.h: file format description   Nick Alcock
• [PATCH 19/19] binutils: CTF support for objdump and readelf   Nick Alcock
• CTF format overview   Nick Alcock
• [PATCH 02/19] include: new header ctf-api.h   Nick Alcock
• [PATCH 03/19] libctf: lowest-level memory allocation and debug-dumping wrappers   Nick Alcock
• [PATCH 04/19] libctf: low-level list manipulation and helper utilities   Nick Alcock
• [PATCH 05/19] libctf: error handling   Nick Alcock
• [PATCH 06/19] libctf: hashing   Nick Alcock
• [PATCH 08/19] libctf: creation functions   Nick Alcock
• [PATCH 18/19] libctf: build system   Nick Alcock
• Healthy Lifestyle Challenge: Eat out with confidence   Dr Cris Beer
• Healthy Lifestyle Challenge: Don't spend a fortune and buy smart   Dr Cris Beer
• Healthy Lifestyle Challenge: Plan Well Plan to Succeed   Dr Cris Beer
• Healthy Lifestyle Challenge: Practise Portion Perfection   Dr Cris Beer
• Reduce Mindless Eating   Dr Cris Beer
• [PATCH] Add extended mnemonics for bctar. Fix setting of 'at' branch hints.   Peter Bergner
• [PATCH] Add extended mnemonics for bctar. Fix setting of 'at' branch hints.   Peter Bergner
• [PATCH] x86: Support Intel AVX512 BF16   Jan Beulich
• [PATCH] x86: Support Intel AVX512 BF16   Jan Beulich
• [PATCH] x86: Support Intel AVX512 BF16   Jan Beulich
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   Jan Beulich
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   Jan Beulich
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   Jan Beulich
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   Jan Beulich
• [PATCH v2 6/6] sim/common: Fix issue with wrong byte order on BE targets   Andrew Burgess
• [PATCH v2 6/6] sim/common: Fix issue with wrong byte order on BE targets   Andrew Burgess
• [PATCH v2 5/6] sim/or1k: Add test for 64-bit fpu operations   Andrew Burgess
• [PATCH v2 3/6] sim/or1k: Regenerate sim for orfp64a32 spec   Andrew Burgess
• [PATCH v2 4/6] sim/common: Wire in df/di conversion   Andrew Burgess
• RFC: ld: Add --section-ordering-file FILE   Erik Christiansen
• [PATCH][Binutils][AArch64] When DF_BIND_NOW don't use TLSDESC GOT value.   Tamar Christina
• Commit: Fix libiberty stack exhaustion bug   Nick Clifton
• [PATCH v3] ld: Add --no-print-map-discarded option   Nick Clifton
• [PATCH, BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction   Nick Clifton
• [PATCH. BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions.   Nick Clifton
• [PATCH][Binutils][AArch64] When DF_BIND_NOW don't use TLSDESC GOT value.   Nick Clifton
• [PATCH v2 2/6] opcodes: Regenerate opcodes for orfp64a32 spec   Nick Clifton
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Nick Clifton
• [PATCH v3] ld: Add --no-print-map-discarded option   Nick Clifton
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Nick Clifton
• New linker testsuite failures   Nick Clifton
• RFC: ld: Add --section-ordering-file FILE   Nick Clifton
• [PATCH][MSP430] Add options to toggle NOP warnings for possible interrupt state changes   Nick Clifton
• [PATCH] [MSP430] Define __crt0_init_bss/__crt0_movedata symbols when .lower or .either prefixed sections are present   Nick Clifton
• [PATCH] [MSP430] [LD] Leave placement of .lower and .upper sections to generic linker code   Nick Clifton
• RFC: ld: Add --section-ordering-file FILE   Nick Clifton
• RFC: ld: Add --section-ordering-file FILE   Nick Clifton
• [PATCH] [MSP430] [GAS] Define symbols for functions to run through .{preinit,init,fini}_array sections   Nick Clifton
• [PATCH, BFD, AArch64] Improve bti/pac plts.   Nick Clifton
• Commit: Update "how to make a release" documentation   Nick Clifton
• [PATCH, ld, testsuite] Use better test for usable compiler in ld testsuite   Nick Clifton
• [Patch, Arm, BFD] Fix get_value_helper   Nick Clifton
• Commit: Strip: do not merge notes when stripping debug.   Nick Clifton
• PING^2 [PATCH] LTO: Properly handle wrapper symbols in IR   Nick Clifton
• minor: punctuation in target-specific   Nick Clifton
• New Russian PO file for 'ld' (version 2.31.90)   Nick Clifton
• [PATCH, BINUTILS, AArch64] Enable Transactional Memory Extension   Nick Clifton
• Objects not being replaced in thin archive   Eric Dana
• Healthy Lifestyle Challenge: Plan Well Plan to Succeed   John Darrington
• [PATCH, BFD, AArch64, x86] Improve warning for --force-bti.   Sudakshina Das
• [PATCH, BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction   Sudakshina Das
• [PATCH. BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions.   Sudakshina Das
• [PATCH, BFD, AArch64, x86] Improve warning for --force-bti.   Sudakshina Das
• [PATCH. BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions.   Sudakshina Das
• [PATCH. BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions.   Sudakshina Das
• [PATCH, BFD, AArch64, x86] Improve warning for --force-bti.   Sudakshina Das
• [PATCH, LD, AArch64] Move ELF options behind -z   Sudakshina Das
• [PATCH, BFD, AArch64] Improve bti/pac plts.   Sudakshina Das
• [Patch, Arm, BFD] Fix get_value_helper   Sudakshina Das
• [PATCH, BFD, AArch64] Improve bti/pac plts.   Sudakshina Das
• [PATCH, BINUTILS, AArch64] Enable Transactional Memory Extension   Sudakshina Das
• [arm] Too strict linker assert?   Richard Earnshaw
• [PATCH] gas: use literals/const16 for xtensa loop relaxation   Max Filippov
• [PATCH v2] gas: use literals/const16 for xtensa loop relaxation   Max Filippov
• [PATCH v2] gas: use literals/const16 for xtensa loop relaxation   Max Filippov
• [PATCH] xtensa: gas: put .literal_position at section start   Max Filippov
• [PATCH] xtensa: gas: clean up literal management code   Max Filippov
• [PATCH 0/2] xtensa: gas: clean up test suite and add tests   Max Filippov
• [PATCH 1/2] xtensa: gas: convert tests to run_dump_tests   Max Filippov
• [PATCH 2/2] xtensa: gas: add relaxations tests   Max Filippov
• [PATCH] xtensa: gas: put .literal_position at section start   Max Filippov
• [PATCH] xtensa: gas: clean up literal management code   Max Filippov
• [PATCH 1/2] xtensa: gas: convert tests to run_dump_tests   Max Filippov
• [PATCH 2/2] xtensa: gas: add relaxations tests   Max Filippov
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Brian Groose
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Brian Groose
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Brian Groose
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Brian Groose
• [PATCH v2 0/6] OpenRISC orfpx64a32 support   Stafford Horne
• [PATCH v2 1/6] cpu: Add support for orfp64a32 spec   Stafford Horne
• [PATCH v2 4/6] sim/common: Wire in df/di conversion   Stafford Horne
• [PATCH v2 2/6] opcodes: Regenerate opcodes for orfp64a32 spec   Stafford Horne
• [PATCH v2 3/6] sim/or1k: Regenerate sim for orfp64a32 spec   Stafford Horne
• [PATCH v2 5/6] sim/or1k: Add test for 64-bit fpu operations   Stafford Horne
• [PATCH v2 6/6] sim/common: Fix issue with wrong byte order on BE targets   Stafford Horne
• [PATCH v2 6/6] sim/common: Fix issue with wrong byte order on BE targets   Stafford Horne
• [PATCH v2 3/6] sim/or1k: Regenerate sim for orfp64a32 spec   Stafford Horne
• [PATCH] [MIPS] Add RDHWR with the SEL field for MIPSR6   Paul Hua
• [PATCH] [MIPS] Add RDHWR with the SEL field for MIPSR6   Paul Hua
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Paul Hua
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Paul Hua
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Paul Hua
• [PATCH 1/2] [MIPS] Apply ASE information for the selected processor   Paul Hua
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Paul Hua
• [PATCH] [MIPS] Improve warning message for $0 constraint on MIPSR6 branches   Paul Hua
• [PATCH] [MIPS] Fix M5100 flags test with interAptiv-MR2   Paul Hua
• [PATCH] [MIPS] Add load-link, store-conditional paired instructions   Paul Hua
• bfd/elf.c assertion for multiple relocations to same section   Joe Lawrence
• bfd/elf.c assertion for multiple relocations to same section   Joe Lawrence
• [PATCH][MSP430] Add options to toggle NOP warnings for possible interrupt state changes   Jozef Lawrynowicz
• [PATCH][MSP430] Add options to toggle NOP warnings for possible interrupt state changes   Jozef Lawrynowicz
• [PATCH] [MSP430] [LD] Leave placement of .lower and .upper sections to generic linker code   Jozef Lawrynowicz
• [PATCH] [MSP430] Define __crt0_init_bss/__crt0_movedata symbols when .lower or .either prefixed sections are present   Jozef Lawrynowicz
• [PATCH] [MSP430] [GAS] Define symbols for functions to run through .{preinit,init,fini}_array sections   Jozef Lawrynowicz
• [PATCH] [MSP430] [GAS] Define symbols for functions to run through .{preinit,init,fini}_array sections   Jozef Lawrynowicz
• [PATCH, ld, testsuite] Use better test for usable compiler in ld testsuite   Sandra Loosemore
• [PATCH, BFD, AArch64, x86] Improve warning for --force-bti.   H.J. Lu
• [PATCH, BFD, AArch64, x86] Improve warning for --force-bti.   H.J. Lu
• [PATCH] LTO: Change resolution to LDPR_PREVAILING_DEF for wrapper symbol   H.J. Lu
• [PATCH] LTO: Change resolution to LDPR_PREVAILING_DEF for wrapper symbol   H.J. Lu
• [PATCH] LTO: Properly handle wrapper symbols in IR   H.J. Lu
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   H.J. Lu
• On the implementation of IBT-enabled PLT with lazy binding   H.J. Lu
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   H.J. Lu
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   H.J. Lu
• [PATCH] x86: Support Intel AVX512 BF16   H.J. Lu
• [PATCH] x86: Add assembler -mx86-used-note=yes test   H.J. Lu
• RFC: Define GNU_PROPERTY_X86_ISA_1_AVX512_BF16   H.J. Lu
• [PATCH] x86: Move x86-specific linker options to elf_linker_x86_params   H.J. Lu
• [PATCH] x86: Support Intel AVX512 BF16   H.J. Lu
• [PATCH] Use elf-x86.em for i386-moss and i386-beos   H.J. Lu
• [PATCH] Count i386-moss as ELF   H.J. Lu
• [PATCH] x86: Remove i386-*-kaos* and i386-*-chaos targets   H.J. Lu
• [PATCH] XFAIL PR ld/20995 tests for lynxos and nto targets   H.J. Lu
• csky ld testsuite fixes   H.J. Lu
• csky ld testsuite fixes   H.J. Lu
• PING^1 [PATCH] LTO: Properly handle wrapper symbols in IR   H.J. Lu
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   H.J. Lu
• [PATCH] x86: Add -z cet-report=[none|warning|error]   H.J. Lu
• [PATCH] ld: Add -static-pie tests   H.J. Lu
• [PATCH] ld: Don't define __rel[a]_iplt_start/__rel[a]_iplt_end in PIE   H.J. Lu
• [PATCH] Check corrupt VTENTRY entry in bfd_elf_gc_record_vtentry   H.J. Lu
• [PATCH] Check corrupt VTENTRY entry in bfd_elf_gc_record_vtentry   H.J. Lu
• [PATCH] ld: Add -static-pie tests   H.J. Lu
• RFC: ld: Add --section-ordering-file FILE   H.J. Lu
• RFC: ld: Add --section-ordering-file FILE   H.J. Lu
• RFC: ld: Add --section-ordering-file FILE   H.J. Lu
• RFC: ld: Add --section-ordering-file FILE   H.J. Lu
• [PATCH] x86: Also check x86 linker_def for non-shared definition   H.J. Lu
• [PATCH] x86: Suggest -fPIE when not building shared object   H.J. Lu
• Automatic makefile dependencies for generated ld/e*.c   H.J. Lu
• Automatic makefile dependencies for generated ld/e*.c   H.J. Lu
• PING^2 [PATCH] LTO: Properly handle wrapper symbols in IR   H.J. Lu
• [PATCH] Don't complain undefined weak dynamic reference   H.J. Lu
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   H.J. Lu
• [PATCH] elf: Allocate a new segment for -z separate-code first   H.J. Lu
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   H.J. Lu
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   H.J. Lu
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   H.J. Lu
• [PATCH] i386: Don't add 0x66 prefix to IRET for .code16gcc   H.J. Lu
• [arm] Too strict linker assert?   Christophe Lyon
• [arm] Too strict linker assert?   Christophe Lyon
• [arm] Too strict linker assert?   Christophe Lyon
• PR24402, global buffer overflow in symtab_finalize   Alan Modra
• BFD whitespace fixes   Alan Modra
• ldlex.l tidy   Alan Modra
• PR24411, Division is not accepted in MEMORY length expression   Alan Modra
• [PATCH] Add extended mnemonics for bctar. Fix setting of 'at' branch hints.   Alan Modra
• PowerPC disassembler: Don't emit trailing spaces   Alan Modra
• PowerPC bc extended branch mnemonics and "y" hints   Alan Modra
• PowerPC conditional branch test   Alan Modra
• getting latest LD manual in pdf format   Alan Modra
• Sync libiberty from gcc   Alan Modra
• PR24421, Wrong brackets in opcodes/arm-dis.c   Alan Modra
• print_insn_powerpc tidy   Alan Modra
• [PATCH] x86: Move x86-specific linker options to elf_linker_x86_params   Alan Modra
• Fix x86_64-rdos build fail   Alan Modra
• csky ld testsuite fixes   Alan Modra
• csky ld testsuite fixes   Alan Modra
• Regen BLD-POTFILES.in   Alan Modra
• Fix some ld dependencies   Alan Modra
• cskyelf.em branch stub handling   Alan Modra
• [PATCH] XFAIL PR ld/20995 tests for lynxos and nto targets   Alan Modra
• [PATCH] ld: Don't define __rel[a]_iplt_start/__rel[a]_iplt_end in PIE   Alan Modra
• [PATCH] Check corrupt VTENTRY entry in bfd_elf_gc_record_vtentry   Alan Modra
• PR24435, buffer overflow reading dynamic entries   Alan Modra
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Alan Modra
• ld TDIRS substitution   Alan Modra
• Automatic makefile dependencies for generated ld/e*.c   Alan Modra
• [PR24444] speed up locview resolution wiht relaxable frags   Alan Modra
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Alan Modra
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Alan Modra
• Make frag fr_fix unsigned   Alan Modra
• Make fixup fx_where unsigned   Alan Modra
• Move fixup fx_bit_fixP and fx_im_disp fields to TC_FIX_TYPE   Alan Modra
• ns32k testsuite tidy   Alan Modra
• ns32k testsuite tidy   Alan Modra
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Alan Modra
• bfd/elf.c assertion for multiple relocations to same section   Alan Modra
• [PR24444] speed up locview resolution wiht relaxable frags   Alan Modra
• s12z and h8300 no-print-map-discarded fails   Alan Modra
• Automatic makefile dependencies for generated ld/e*.c   Alan Modra
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Alan Modra
• Linux ppc64 - compatibility-ldbl.o can't find std::num_put   Alan Modra
• resolve_symbol_value vs. .loc view resolution   Alan Modra
• [PR24444] speed up locview resolution wiht relaxable frags   Alan Modra
• [PATCH] Don't complain undefined weak dynamic reference   Alan Modra
• [PATCH] elf: Allocate a new segment for -z separate-code first   Alan Modra
• ld.texi tweak for pod2man   Alan Modra
• Work around gcc9 warning bug   Alan Modra
• PowerPC64 GOT indirect to GOT relative optimisation   Alan Modra
• [PATCH, BFD, LD, AArch64, 4/4] Add --pac-plt to enable PLTs protected with PAC.   Szabolcs Nagy
• [PR24444] speed up locview resolution wiht relaxable frags   Alexandre Oliva
• [PR24444] speed up locview resolution wiht relaxable frags   Alexandre Oliva
• [PR24444] speed up locview resolution wiht relaxable frags   Alexandre Oliva
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   Rainer Orth
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   Rainer Orth
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   Rainer Orth
• Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86   Rainer Orth
• LD_DEBUG=bindings shows resolution *via* the exe?   Brian Rossa
• [committed] MIPS/include: opcode/mips.h: Update stale comment for CODE20 operand   Maciej W. Rozycki
• [PATCH v2] ld: Add --no-print-map-discarded option   Faraz Shahbazker
• [PATCH v3] ld: Add --no-print-map-discarded option   Faraz Shahbazker
• [PATCH] [MIPS] Add RDHWR with the SEL field for MIPSR6   Faraz Shahbazker
• [PATCH] [MIPS] Add RDHWR with the SEL field for MIPSR6   Faraz Shahbazker
• [PATCH 1/2] [MIPS] Apply ASE information for the selected processor   Faraz Shahbazker
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Faraz Shahbazker
• [PATCH v3] ld: Add --no-print-map-discarded option   Faraz Shahbazker
• [PATCH v3] ld: Add --no-print-map-discarded option   Faraz Shahbazker
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Faraz Shahbazker
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Faraz Shahbazker
• [PATCH 2/2] [MIPS] Add i6500 CPU and fix i6400 default ASEs   Faraz Shahbazker
• New linker testsuite failures   Faraz Shahbazker
• [PATCH] [MIPS] Improve warning message for $0 constraint on MIPSR6 branches   Faraz Shahbazker
• [PATCH] [MIPS] Fix M5100 flags test with interAptiv-MR2   Faraz Shahbazker
• [PATCH] [MIPS] Add load-link, store-conditional paired instructions   Faraz Shahbazker
• [PATCH] [MIPS] Add load-link, store-conditional paired EVA instructions   Faraz Shahbazker
• getting latest LD manual in pdf format   Gabriel Staples
• getting latest LD manual in pdf format   Gabriel Staples
• getting latest LD manual in pdf format   Gabriel Staples
• It's your turn to become a $$$millionaire$$$   Tony
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Andre Simoes Dias Vieira
• [PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline   Andre Simoes Dias Vieira
• LD_DEBUG=bindings shows resolution *via* the exe?   Florian Weimer
• [PATCH] RISC-V: Don't check ABI flags if no code section.   Jim Wilson
• Healthy Lifestyle Challenge: Plan Well Plan to Succeed   Jim Wilson
• [PATCH] RISC-V: Enable 32-bit linux gdb core file support.   Jim Wilson
• RISC-V hex file output   Jim Wilson
• minor: punctuation in target-specific   Christopher Yeleighton
• Decision Makers   alicia.brooks@itaudiencesonline.com
• [PATCH v2] gas: use literals/const16 for xtensa loop relaxation   augustine.sterling@gmail.com
• [PATCH 2/2] xtensa: gas: add relaxations tests   augustine.sterling@gmail.com
• [PATCH] xtensa: gas: clean up literal management code   augustine.sterling@gmail.com
• [PATCH] xtensa: gas: put .literal_position at section start   augustine.sterling@gmail.com
• On the implementation of IBT-enabled PLT with lazy binding   Fāng-ruì Sòng via binutils
• RISC-V hex file output   donato kava

Last message date: Tue Apr 30 22:58:00 GMT 2019
Archived on: Sat Apr 4 21:49:47 GMT 2020

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