[PATCH] x86: Mark cvtpi2ps and cvtpi2pd as MMX
H.J. Lu
hjl.tools@gmail.com
Wed Feb 19 14:10:00 GMT 2020
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Wed Feb 19 14:10:00 GMT 2020
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On Wed, Feb 19, 2020 at 5:53 AM Jan Beulich <jbeulich@suse.com> wrote: > > On 19.02.2020 14:46, H.J. Lu wrote: > > On Wed, Feb 19, 2020 at 5:40 AM Jan Beulich <jbeulich@suse.com> wrote: > >> > >> On 19.02.2020 14:14, H.J. Lu wrote: > >>> On Wed, Feb 19, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote: > >>>> On 19.02.2020 13:58, H.J. Lu wrote: > >>>>> --- a/gas/config/tc-i386.c > >>>>> +++ b/gas/config/tc-i386.c > >>>>> @@ -8636,7 +8636,9 @@ output_insn (void) > >>>>> x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_X87; > >>>>> if (i.has_regmmx > >>>>> || i.tm.base_opcode == 0xf77 /* emms */ > >>>>> - || i.tm.base_opcode == 0xf0e /* femms */) > >>>>> + || i.tm.base_opcode == 0xf0e /* femms */ > >>>>> + || i.tm.base_opcode == 0xf2a /* cvtpi2ps */ > >>>>> + || i.tm.base_opcode == 0x660f2a /* cvtpi2pd */) > >>>> > >>>> While for the former I agree, the latter - as pointed out > >>>> elsewhere - does explicitly _not_ switch into MMX mode when > >>>> the source operand is in memory. > >>> > >>> They are still MMX instructions even with memory operand. > >> > >> Not exactly, see CVTPI2PD's description in the SDM. > > > > They are MMX in term of pure SSE. > > As per your suggested doc patch "pure SSE" means "not touching MMX > registers or state". This is the case for CVTPI2PD. I will exclude cvtpi2ps and cvtpi2pd explicitly. -- H.J.
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