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[PATCH v2 1/2] RISC-V: Fallback for instructions longer than 64b

Jan Beulich jbeulich@suse.com
Thu Oct 6 08:22:08 GMT 2022 
On 06.10.2022 06:40, Tsukasa OI via Binutils wrote:
> We don't support instructions longer than 64-bits yet.  Still, we can
> modify validate_riscv_insn function to prevent unexpected behavior by
> limiting the "length" of an instruction to 64-bit (or less).
> 
> gas/ChangeLog:
> 
> 	* config/tc-riscv.c (validate_riscv_insn): Fix function
> 	description comment based on current usage.  Limit instruction
> 	length up to 64-bit for now.  Make sure that required_bits does
> 	not corrupt even if unsigned long long is longer than 64-bit.

While I agree with the code change, I don't agree with the adjustment
to the comment - you're changing it to match the sole present caller,
but imo such a comment ought to describe the behavior of the function
irrespective of how it's used at any given point in time.

Jan
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