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[PATCH] LoongArch: Use copy relocation for %pc_lo12 against external symbol

liuzhensong liuzhensong@loongson.cn
Thu Sep 1 02:31:23 GMT 2022 
在 2022/9/1 上午10:12, Xi Ruoyao 写道:
> On Thu, 2022-09-01 at 09:38 +0800, liuzhensong wrote:
>>> But in commit 42bd525 we already started to rely on
>>> undocumented %pc_{hi20,lo12} behavior: if you just apply them "as
>>> documented" to the pcalau12i/jirl pairs the result will be
>>> absolutely
>>> wrong.  And 42bd525 behavior is not fully correct: if you just write
>>>
>>> pcalau12i $t0, %pc_hi20(data)
>>> ld.d, $t0, $t0, %pc_lo12(data)
>> Do you have a test case?
> $ cat t2.s
> .text
> .align 2
> .type x, @function
> .global x
> x:
> 	pcalau12i	$a0, %pc_hi20(data)
> 	ld.d		$a0, $a0, %pc_lo12(data)
> 	jr		$ra
> $ gcc t2.s -c
> $ ./ld/ld-new t2.o -shared
> $ objdump -d | grep -A50 data
> 0000000000000210 <data@plt>:
>   210:	1c00010f 	pcaddu12i   	$t3, 8(0x8)
>   214:	28f801ef 	ld.d        	$t3, $t3, -512(0xe00)
>   218:	4c0001ed 	jirl        	$t1, $t3, 0
>   21c:	03400000 	andi        	$zero, $zero, 0x0
>
> Disassembly of section .text:
>
> 0000000000000220 <x>:
>   220:	1a000004 	pcalau12i   	$a0, 0
>   224:	28c84084 	ld.d        	$a0, $a0, 528(0x210)
>   228:	4c000020 	jirl        	$zero, $ra, 0
>
> i.e.  Instead of reporting an error like "cannot create a runtime
> relocation against external symbol 'data'", the linker silently produces
> a PLT (nonsense: can you use a PLT for data?) and load two instructions
> from the PLT into the register (also nonsense).  So if someone mistypes
> "la.local" where "la.global" should be used (it's just a simple
> programming mistake, and it's likely to happen in the practice!), the
> linking will "succeeds" silently.  Then the program blows up at runtime.
This can be fixed as a bug.
>> It doesn't make sense for only "pcaddu18i + jirl" to access 128G.
>> What we need is a jump that can access ±2G, just like any other pc-
>> relative instructions can access ±2G.
> The point is, if we interpret %pc_lo12 "as it's documented":
>
>      "(*(uint32_t *) PC) [21 ... 10] = (S+A) [11 ... 0]"
>
> it will be absolutely wrong for a jirl instruction.  You may update the
> doc to say something like "if R_LARCH_PCALA_LO12 is applied to a jirl
> instruction, a PLT entry will be created and blah blah". But again I'm
> not sure about if "the behavior of a relocation depends on the
> instruction for which it's applied" is a good idea.
>
> <rant>We are using highly imprecise descriptions for PCALA-style
> relocations in ELF psABI, despite I've disagreed in the review.  Now if
> someone wants to know "how this relocation will *really* behave", he/she
> will need to read BFD code.  PCALAU12I instruction itself is already
> puzzling enough (comparing with PCADDU12I, which behaves more "normal"),
> now the doc just makes it more puzzling.</rant>
pcalau12i makes it easier to access 4k starting addresses, and pcaddu12i 
need more info in relocation.
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