[V2 PATCH] RISC-V: Add Smepmp CSR 'mseccfg' define and testcases.
Christoph Müllner
christoph.muellner@vrull.eu
Fri Sep 30 07:53:46 GMT 2022
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Fri Sep 30 07:53:46 GMT 2022
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Hi Jiawei, These CSRs are defined in Priv 1.12 (Sm1p12), not in Smepmp. Smepmp only defines the behavior. Note, that I wrote a similar patch a month ago, but I reached out to Greg Favor to get this clarified. He clearly stated that Sm1p12 defines the CSRs. BR Christoph On Fri, Sep 30, 2022 at 9:34 AM jiawei <jiawei@iscas.ac.cn> wrote: > Machine Security Configuration[1] (mseccfg) is a new RW Machine mode CSR, > used for configuring various security mechanisms present on the hart, > and only accessible to machine mode. It is 64 bits wide, and is at > address 0x747 on RV64 and 0x747 (low 32bits), 0x757 (high 32bits) on RV32. > We change these two CSR to support smepmp extension features. > > [1] https://github.com/riscv/riscv-tee/tree/main/Smepmp > > V2: Update implement with new Binutils version. > > bfd/ChangeLog: > > * elfxx-riscv.c: New extension. > > gas/ChangeLog: > > * config/tc-riscv.c (enum riscv_csr_class): New class. > (riscv_csr_address): New csr. > * testsuite/gas/riscv/csr-version-1p10.d: Change csr. > * testsuite/gas/riscv/csr-version-1p10.l: Ditto. > * testsuite/gas/riscv/csr-version-1p11.d: Ditto. > * testsuite/gas/riscv/csr-version-1p11.l: Ditto. > * testsuite/gas/riscv/csr-version-1p12.d: Ditto. > * testsuite/gas/riscv/csr-version-1p12.l: Ditto. > * testsuite/gas/riscv/csr-version-1p9p1.d: Ditto. > * testsuite/gas/riscv/csr-version-1p9p1.l: Ditto. > * testsuite/gas/riscv/csr.s: Ditto. > > include/ChangeLog: > > * opcode/riscv-opc.h (CSR_MSECCFG): Change csr. > (CSR_MSECCFGH): Ditto. > (DECLARE_CSR): Ditto. > > --- > bfd/elfxx-riscv.c | 1 + > gas/config/tc-riscv.c | 8 ++++++++ > gas/testsuite/gas/riscv/csr-version-1p10.d | 8 ++++---- > gas/testsuite/gas/riscv/csr-version-1p10.l | 12 ++++++------ > gas/testsuite/gas/riscv/csr-version-1p11.d | 8 ++++---- > gas/testsuite/gas/riscv/csr-version-1p11.l | 12 ++++++------ > gas/testsuite/gas/riscv/csr-version-1p12.d | 8 ++++---- > gas/testsuite/gas/riscv/csr-version-1p12.l | 8 ++++++-- > gas/testsuite/gas/riscv/csr-version-1p9p1.d | 8 ++++---- > gas/testsuite/gas/riscv/csr-version-1p9p1.l | 12 ++++++------ > gas/testsuite/gas/riscv/csr.s | 6 ++++-- > include/opcode/riscv-opc.h | 10 ++++++---- > 12 files changed, 59 insertions(+), 42 deletions(-) > > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > index fa393c7c427..e5dd8f106cf 100644 > --- a/bfd/elfxx-riscv.c > +++ b/bfd/elfxx-riscv.c > @@ -1211,6 +1211,7 @@ static struct riscv_supported_ext > riscv_supported_std_z_ext[] = > > static struct riscv_supported_ext riscv_supported_std_s_ext[] = > { > + {"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > {"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > {"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > {"sstc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c > index d9f63b11398..171150b7821 100644 > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -78,6 +78,8 @@ enum riscv_csr_class > CSR_CLASS_SSTC_AND_H, /* Sstc only (with H) */ > CSR_CLASS_SSTC_32, /* Sstc RV32 only */ > CSR_CLASS_SSTC_AND_H_32, /* Sstc RV32 only (with H) */ > + CSR_CLASS_SMEPMP, /* Smepmp only. */ > + CSR_CLASS_SMEPMP_32, /* Smepmp RV32 only. */ > }; > > /* This structure holds all restricted conditions for a CSR. */ > @@ -977,6 +979,12 @@ riscv_csr_address (const char *csr_name, > || csr_class == CSR_CLASS_SSTC_AND_H_32); > extension = "sstc"; > break; > + case CSR_CLASS_SMEPMP_32: > + is_rv32_only = true; > + /* Fall through. */ > + case CSR_CLASS_SMEPMP: > + extension = "smepmp"; > + break; > case CSR_CLASS_DEBUG: > break; > default: > diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d > b/gas/testsuite/gas/riscv/csr-version-1p10.d > index bd8b10302e3..5d6cad65d69 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p10.d > +++ b/gas/testsuite/gas/riscv/csr-version-1p10.d > @@ -203,10 +203,6 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+30a59073[ ]+csrw[ ]+0x30a,a1 > [ ]+[0-9a-f]+:[ ]+31a02573[ ]+csrr[ ]+a0,0x31a > [ ]+[0-9a-f]+:[ ]+31a59073[ ]+csrw[ ]+0x31a,a1 > -[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,0x747 > -[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+0x747,a1 > -[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,0x757 > -[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+0x757,a1 > [ ]+[0-9a-f]+:[ ]+3a002573[ ]+csrr[ ]+a0,pmpcfg0 > [ ]+[0-9a-f]+:[ ]+3a059073[ ]+csrw[ ]+pmpcfg0,a1 > [ ]+[0-9a-f]+:[ ]+3a102573[ ]+csrr[ ]+a0,pmpcfg1 > @@ -709,6 +705,10 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+24d59073[ ]+csrw[ ]+vstimecmp,a1 > [ ]+[0-9a-f]+:[ ]+25d02573[ ]+csrr[ ]+a0,vstimecmph > [ ]+[0-9a-f]+:[ ]+25d59073[ ]+csrw[ ]+vstimecmph,a1 > +[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,mseccfg > +[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+mseccfg,a1 > +[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,mseccfgh > +[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+mseccfgh,a1 > [ ]+[0-9a-f]+:[ ]+04302573[ ]+csrr[ ]+a0,utval > [ ]+[0-9a-f]+:[ ]+04359073[ ]+csrw[ ]+utval,a1 > [ ]+[0-9a-f]+:[ ]+14302573[ ]+csrr[ ]+a0,stval > diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l > b/gas/testsuite/gas/riscv/csr-version-1p10.l > index 999e9af1520..53ab22f1d51 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p10.l > +++ b/gas/testsuite/gas/riscv/csr-version-1p10.l > @@ -150,12 +150,6 @@ > .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.10' > .*Warning: invalid CSR `menvcfgh', needs rv32i extension > .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.10' > -.*Warning: invalid CSR `mseccfg' for the privileged spec `1.10' > -.*Warning: invalid CSR `mseccfg' for the privileged spec `1.10' > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh' for the privileged spec `1.10' > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh' for the privileged spec `1.10' > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > .*Warning: invalid CSR `pmpcfg3', needs rv32i extension > @@ -618,6 +612,12 @@ > .*Warning: invalid CSR `vstimecmph', needs rv32i extension > .*Warning: invalid CSR `vstimecmph', needs `h' extension > .*Warning: invalid CSR `vstimecmph', needs `sstc' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.10' > .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.10' > .*Warning: invalid CSR `sbadaddr' for the privileged spec `1.10' > diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d > b/gas/testsuite/gas/riscv/csr-version-1p11.d > index 5d6333884f1..a20de4a7e20 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p11.d > +++ b/gas/testsuite/gas/riscv/csr-version-1p11.d > @@ -203,10 +203,6 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+30a59073[ ]+csrw[ ]+0x30a,a1 > [ ]+[0-9a-f]+:[ ]+31a02573[ ]+csrr[ ]+a0,0x31a > [ ]+[0-9a-f]+:[ ]+31a59073[ ]+csrw[ ]+0x31a,a1 > -[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,0x747 > -[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+0x747,a1 > -[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,0x757 > -[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+0x757,a1 > [ ]+[0-9a-f]+:[ ]+3a002573[ ]+csrr[ ]+a0,pmpcfg0 > [ ]+[0-9a-f]+:[ ]+3a059073[ ]+csrw[ ]+pmpcfg0,a1 > [ ]+[0-9a-f]+:[ ]+3a102573[ ]+csrr[ ]+a0,pmpcfg1 > @@ -709,6 +705,10 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+24d59073[ ]+csrw[ ]+vstimecmp,a1 > [ ]+[0-9a-f]+:[ ]+25d02573[ ]+csrr[ ]+a0,vstimecmph > [ ]+[0-9a-f]+:[ ]+25d59073[ ]+csrw[ ]+vstimecmph,a1 > +[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,mseccfg > +[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+mseccfg,a1 > +[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,mseccfgh > +[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+mseccfgh,a1 > [ ]+[0-9a-f]+:[ ]+04302573[ ]+csrr[ ]+a0,utval > [ ]+[0-9a-f]+:[ ]+04359073[ ]+csrw[ ]+utval,a1 > [ ]+[0-9a-f]+:[ ]+14302573[ ]+csrr[ ]+a0,stval > diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l > b/gas/testsuite/gas/riscv/csr-version-1p11.l > index a099e4ecc93..c14f46d119b 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p11.l > +++ b/gas/testsuite/gas/riscv/csr-version-1p11.l > @@ -150,12 +150,6 @@ > .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.11' > .*Warning: invalid CSR `menvcfgh', needs rv32i extension > .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.11' > -.*Warning: invalid CSR `mseccfg' for the privileged spec `1.11' > -.*Warning: invalid CSR `mseccfg' for the privileged spec `1.11' > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh' for the privileged spec `1.11' > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh' for the privileged spec `1.11' > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > .*Warning: invalid CSR `pmpcfg3', needs rv32i extension > @@ -616,6 +610,12 @@ > .*Warning: invalid CSR `vstimecmph', needs rv32i extension > .*Warning: invalid CSR `vstimecmph', needs `h' extension > .*Warning: invalid CSR `vstimecmph', needs `sstc' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.11' > .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.11' > .*Warning: invalid CSR `sbadaddr' for the privileged spec `1.11' > diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d > b/gas/testsuite/gas/riscv/csr-version-1p12.d > index 728e647c552..2717d717feb 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p12.d > +++ b/gas/testsuite/gas/riscv/csr-version-1p12.d > @@ -203,10 +203,6 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+30a59073[ ]+csrw[ ]+menvcfg,a1 > [ ]+[0-9a-f]+:[ ]+31a02573[ ]+csrr[ ]+a0,menvcfgh > [ ]+[0-9a-f]+:[ ]+31a59073[ ]+csrw[ ]+menvcfgh,a1 > -[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,mseccfg > -[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+mseccfg,a1 > -[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,mseccfgh > -[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+mseccfgh,a1 > [ ]+[0-9a-f]+:[ ]+3a002573[ ]+csrr[ ]+a0,pmpcfg0 > [ ]+[0-9a-f]+:[ ]+3a059073[ ]+csrw[ ]+pmpcfg0,a1 > [ ]+[0-9a-f]+:[ ]+3a102573[ ]+csrr[ ]+a0,pmpcfg1 > @@ -709,6 +705,10 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+24d59073[ ]+csrw[ ]+vstimecmp,a1 > [ ]+[0-9a-f]+:[ ]+25d02573[ ]+csrr[ ]+a0,vstimecmph > [ ]+[0-9a-f]+:[ ]+25d59073[ ]+csrw[ ]+vstimecmph,a1 > +[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,mseccfg > +[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+mseccfg,a1 > +[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,mseccfgh > +[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+mseccfgh,a1 > [ ]+[0-9a-f]+:[ ]+04302573[ ]+csrr[ ]+a0,0x43 > [ ]+[0-9a-f]+:[ ]+04359073[ ]+csrw[ ]+0x43,a1 > [ ]+[0-9a-f]+:[ ]+14302573[ ]+csrr[ ]+a0,stval > diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l > b/gas/testsuite/gas/riscv/csr-version-1p12.l > index cf8f2e25634..37eeb405aeb 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p12.l > +++ b/gas/testsuite/gas/riscv/csr-version-1p12.l > @@ -136,8 +136,6 @@ > .*Warning: invalid CSR `mstatush', needs rv32i extension > .*Warning: invalid CSR `menvcfgh', needs rv32i extension > .*Warning: invalid CSR `menvcfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > .*Warning: invalid CSR `pmpcfg3', needs rv32i extension > @@ -478,6 +476,12 @@ > .*Warning: invalid CSR `vstimecmph', needs rv32i extension > .*Warning: invalid CSR `vstimecmph', needs `h' extension > .*Warning: invalid CSR `vstimecmph', needs `sstc' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.12' > .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.12' > .*Warning: invalid CSR `sbadaddr' for the privileged spec `1.12' > diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d > b/gas/testsuite/gas/riscv/csr-version-1p9p1.d > index a34b99f4632..5d3ba2beb4c 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p9p1.d > +++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.d > @@ -203,10 +203,6 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+30a59073[ ]+csrw[ ]+0x30a,a1 > [ ]+[0-9a-f]+:[ ]+31a02573[ ]+csrr[ ]+a0,0x31a > [ ]+[0-9a-f]+:[ ]+31a59073[ ]+csrw[ ]+0x31a,a1 > -[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,0x747 > -[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+0x747,a1 > -[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,0x757 > -[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+0x757,a1 > [ ]+[0-9a-f]+:[ ]+3a002573[ ]+csrr[ ]+a0,0x3a0 > [ ]+[0-9a-f]+:[ ]+3a059073[ ]+csrw[ ]+0x3a0,a1 > [ ]+[0-9a-f]+:[ ]+3a102573[ ]+csrr[ ]+a0,0x3a1 > @@ -709,6 +705,10 @@ Disassembly of section .text: > [ ]+[0-9a-f]+:[ ]+24d59073[ ]+csrw[ ]+vstimecmp,a1 > [ ]+[0-9a-f]+:[ ]+25d02573[ ]+csrr[ ]+a0,vstimecmph > [ ]+[0-9a-f]+:[ ]+25d59073[ ]+csrw[ ]+vstimecmph,a1 > +[ ]+[0-9a-f]+:[ ]+74702573[ ]+csrr[ ]+a0,mseccfg > +[ ]+[0-9a-f]+:[ ]+74759073[ ]+csrw[ ]+mseccfg,a1 > +[ ]+[0-9a-f]+:[ ]+75702573[ ]+csrr[ ]+a0,mseccfgh > +[ ]+[0-9a-f]+:[ ]+75759073[ ]+csrw[ ]+mseccfgh,a1 > [ ]+[0-9a-f]+:[ ]+04302573[ ]+csrr[ ]+a0,ubadaddr > [ ]+[0-9a-f]+:[ ]+04359073[ ]+csrw[ ]+ubadaddr,a1 > [ ]+[0-9a-f]+:[ ]+14302573[ ]+csrr[ ]+a0,sbadaddr > diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l > b/gas/testsuite/gas/riscv/csr-version-1p9p1.l > index 5f298c1dda9..69fe9a6a80b 100644 > --- a/gas/testsuite/gas/riscv/csr-version-1p9p1.l > +++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.l > @@ -160,12 +160,6 @@ > .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.9.1' > .*Warning: invalid CSR `menvcfgh', needs rv32i extension > .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.9.1' > -.*Warning: invalid CSR `mseccfg' for the privileged spec `1.9.1' > -.*Warning: invalid CSR `mseccfg' for the privileged spec `1.9.1' > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh' for the privileged spec `1.9.1' > -.*Warning: invalid CSR `mseccfgh', needs rv32i extension > -.*Warning: invalid CSR `mseccfgh' for the privileged spec `1.9.1' > .*Warning: invalid CSR `pmpcfg0' for the privileged spec `1.9.1' > .*Warning: invalid CSR `pmpcfg0' for the privileged spec `1.9.1' > .*Warning: invalid CSR `pmpcfg1', needs rv32i extension > @@ -668,6 +662,12 @@ > .*Warning: invalid CSR `vstimecmph', needs rv32i extension > .*Warning: invalid CSR `vstimecmph', needs `h' extension > .*Warning: invalid CSR `vstimecmph', needs `sstc' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfg', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > +.*Warning: invalid CSR `mseccfgh', needs rv32i extension > +.*Warning: invalid CSR `mseccfgh', needs `smepmp' extension > .*Warning: invalid CSR `utval' for the privileged spec `1.9.1' > .*Warning: invalid CSR `utval' for the privileged spec `1.9.1' > .*Warning: invalid CSR `fflags', needs `f' extension > diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s > index 128aeb83a04..5590d9f6e87 100644 > --- a/gas/testsuite/gas/riscv/csr.s > +++ b/gas/testsuite/gas/riscv/csr.s > @@ -119,8 +119,6 @@ > # Machine Configuration > csr menvcfg # Added in 1.12 > csr menvcfgh # Added in 1.12 > - csr mseccfg # Added in 1.12 > - csr mseccfgh # Added in 1.12 > > # Machine Memory Protection > csr pmpcfg0 # Added in 1.10 > @@ -397,6 +395,10 @@ > csr vstimecmp > csr vstimecmph > > + # Smepmp extension > + csr mseccfg > + csr mseccfgh > + > # Supported in previous priv spec, but dropped now > > csr ubadaddr # 0x043 in 1.9.1, but the value is utval > since 1.10 > diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h > index e40592159cd..8323119e31a 100644 > --- a/include/opcode/riscv-opc.h > +++ b/include/opcode/riscv-opc.h > @@ -2432,8 +2432,6 @@ > #define CSR_MTVAL2 0x34b > #define CSR_MENVCFG 0x30a > #define CSR_MENVCFGH 0x31a > -#define CSR_MSECCFG 0x747 > -#define CSR_MSECCFGH 0x757 > #define CSR_PMPCFG0 0x3a0 > #define CSR_PMPCFG1 0x3a1 > #define CSR_PMPCFG2 0x3a2 > @@ -2708,6 +2706,9 @@ > #define CSR_STIMECMPH 0x15d > #define CSR_VSTIMECMP 0x24d > #define CSR_VSTIMECMPH 0x25d > +/* Smepmp extension. */ > +#define CSR_MSECCFG 0x747 > +#define CSR_MSECCFGH 0x757 > /* Unprivileged Floating-Point CSR addresses. */ > #define CSR_FFLAGS 0x1 > #define CSR_FRM 0x2 > @@ -3288,8 +3289,6 @@ DECLARE_CSR(mtinst, CSR_MTINST, CSR_CLASS_I, > PRIV_SPEC_CLASS_1P12, PRIV_SPEC_CLA > DECLARE_CSR(mtval2, CSR_MTVAL2, CSR_CLASS_I, PRIV_SPEC_CLASS_1P12, > PRIV_SPEC_CLASS_DRAFT) > DECLARE_CSR(menvcfg, CSR_MENVCFG, CSR_CLASS_I, PRIV_SPEC_CLASS_1P12, > PRIV_SPEC_CLASS_DRAFT) > DECLARE_CSR(menvcfgh, CSR_MENVCFGH, CSR_CLASS_I_32, PRIV_SPEC_CLASS_1P12, > PRIV_SPEC_CLASS_DRAFT) > -DECLARE_CSR(mseccfg, CSR_MSECCFG, CSR_CLASS_I, PRIV_SPEC_CLASS_1P12, > PRIV_SPEC_CLASS_DRAFT) > -DECLARE_CSR(mseccfgh, CSR_MSECCFGH, CSR_CLASS_I_32, PRIV_SPEC_CLASS_1P12, > PRIV_SPEC_CLASS_DRAFT) > DECLARE_CSR(pmpcfg0, CSR_PMPCFG0, CSR_CLASS_I, PRIV_SPEC_CLASS_1P10, > PRIV_SPEC_CLASS_DRAFT) > DECLARE_CSR(pmpcfg1, CSR_PMPCFG1, CSR_CLASS_I_32, PRIV_SPEC_CLASS_1P10, > PRIV_SPEC_CLASS_DRAFT) > DECLARE_CSR(pmpcfg2, CSR_PMPCFG2, CSR_CLASS_I, PRIV_SPEC_CLASS_1P10, > PRIV_SPEC_CLASS_DRAFT) > @@ -3545,6 +3544,9 @@ DECLARE_CSR(stimecmp, CSR_STIMECMP, CSR_CLASS_SSTC, > PRIV_SPEC_CLASS_NONE, PRIV_S > DECLARE_CSR(stimecmph, CSR_STIMECMPH, CSR_CLASS_SSTC_32, > PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) > DECLARE_CSR(vstimecmp, CSR_VSTIMECMP, CSR_CLASS_SSTC_AND_H, > PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) > DECLARE_CSR(vstimecmph, CSR_VSTIMECMPH, CSR_CLASS_SSTC_AND_H_32, > PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) > +/* Smepmp CSRs. */ > +DECLARE_CSR(mseccfg, CSR_MSECCFG, CSR_CLASS_SMEPMP, PRIV_SPEC_CLASS_NONE, > PRIV_SPEC_CLASS_NONE) > +DECLARE_CSR(mseccfgh, CSR_MSECCFGH, CSR_CLASS_SMEPMP_32, > PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) > /* Dropped CSRs. */ > DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, > PRIV_SPEC_CLASS_1P10) > DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, > PRIV_SPEC_CLASS_1P10) > -- > 2.25.1 > >
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