Home Original page

[PATCH] LoongArch: Add support for the ud macro instruction

WANG Xuerui i.swmail@xen0n.name
Mon Dec 1 16:31:13 GMT 2025 
Hi,

On 12/1/25 15:47, Lulu Cai wrote:
> In the "ud ui5" macro, the value of ui5 must be in the range 0–31. It
> expands to "amswap.w $rd, $r1, $rj", where ui5 specifies the register
> number for $rd in the amswap.w instruction, and $rd == $rj.
> 
> The test case have been adjusted to no longer report errors for illegal
> operands of the amswap.w instruction.
> 
> [snip]
> diff --git a/gas/testsuite/gas/loongarch/macro_ud.d b/gas/testsuite/gas/loongarch/macro_ud.d
> new file mode 100644
> index 00000000000..dbc1cdcaf00
> --- /dev/null
> +++ b/gas/testsuite/gas/loongarch/macro_ud.d
> @@ -0,0 +1,41 @@
> +#as:
> +#objdump: -d
> +
> +.*:     file format .*
> +
> +
> +Disassembly of section \.text:
> +
> +0+ <\.text>:
> + *[0-9a-f]+:	38600400 	amswap.w    	\$zero, \$ra, \$zero
> [snip]
> diff --git a/gas/testsuite/gas/loongarch/macro_ud.s b/gas/testsuite/gas/loongarch/macro_ud.s
> new file mode 100644
> index 00000000000..75ebcb8b1b4
> --- /dev/null
> +++ b/gas/testsuite/gas/loongarch/macro_ud.s
> @@ -0,0 +1,32 @@
> +ud  0
> [snip]
> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
> index fa53021cfae..b443aebb477 100644
> --- a/opcodes/loongarch-opc.c
> +++ b/opcodes/loongarch-opc.c
> @@ -448,6 +448,7 @@ static struct loongarch_opcode loongarch_macro_opcodes[] =
>     { 0, 0, "la.tls.desc", "r,l",	  INSN_LA_TLS_DESC64_LARGE_ABS,	0 },
>     { 0, 0, "la.tls.desc", "r,l",	  INSN_LA_TLS_DESC64,		0 },
>     { 0, 0, "la.tls.desc", "r,r,l", INSN_LA_TLS_DESC64_LARGE_PCREL,0 },
> +  { 0, 0, "ud",		 "u",	  "amswap.w $r%1,$r1,$r%1",	0, 0, 0 },
>     { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list.  */
>   };
>   

What about also recognizing the pattern and rendering as such during 
disassembly? It may be hard because an additional constraint is 
involved, may not be possible with the current trivial matching logic... 
But maybe adding a special instruction format specifier just for 
disassembly would be appropriate. Something like "r0:5,r5:5=%1" maybe.
More information about the Binutils mailing list