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[PATCH v8 (+PING) 0/1] RISC-V: Support ".option [no]exact" assembler directives

Tsukasa OI research_trasio@irq.a4lg.com
Thu May 29 06:47:24 GMT 2025 
PING!

Since it's nearly two weeks since previous PATCH (v7) is submitted,
I'll submit PATCH v8 (only grammar fix compared to PATCH v7) as an
effective ping.

Best Regards,
Tsukasa


Version 8 (2025-05-29) - THIS VERSION
======================================

*   Effectively a ping.
*   Rebase.
*   A grammar fix (i.e. -> e.g.) on riscv.h.


Version 1 (2025-05-13)
=======================
cf. <https://sourceware.org/pipermail/binutils/2025-May/141042.html>

This is the initial proposal.


Version 2 (2025-05-14)
=======================
cf. <https://sourceware.org/pipermail/binutils/2025-May/141075.html>

No changes in the code.

*   PATCH 1/2 (Commit message):
    Clarify again that, in the scope of this fix, the relocation is
    optionally removed when the linker relaxation is disabled.
*   PATCH 2/2 (Commit message):
    Notify that the exact mode is already implemented in LLVM.
*   PATCH 2/2 (Documentation):
    *   Imply that there is a small room for minor specification
        change related to ".option exact/noexact".
    *   Document that there are flaky interactions between
        ".option relax/norelax" and ".option exact/noexact"
        and add a warning about them.


Version 3 (2025-05-14) - PATCH 1/2 committed with small changes
================================================================
cf. <https://sourceware.org/pipermail/binutils/2025-May/141092.html>

No changes in the main code (but minor change in the test code).

*   PATCH 2/2 (Commit message):
    Clarify that interactions between ".option relax/norelax" and
    ".option exact/noexact" are flaky (documented in PATCH v2 but also
    noted in the commit message).
*   PATCH 2/2 (Test code):
    exact.s: Add comment "# noexact by default.",
    clarifying that the exact mode is disabled by default.


Version 4 (2025-05-16)
=======================
cf. <https://sourceware.org/pipermail/binutils/2025-May/141139.html>

Adjustments are made after Nelson's changes to error messages and
the support for Zilsd/Zclsd extensions.

*   Commit Message
    Small clarification/fix about handling of macros.
*   Code
    Support Zilsd/Zclsd extensions.
*   Test Code
    Simpler error messages as Nelson changed.


Version 5 (2025-05-16)
=======================
cf. <https://sourceware.org/pipermail/binutils/2025-May/141201.html>

A bugfix on "unimp" and clarification.

*   Code
    Fix to "unimp" (compressed alias).
*   Comment
    Clarification to INSN_NON_EXACT.


Version 6 (2025-05-17)
=======================
cf. <https://sourceware.org/pipermail/binutils/2025-May/141212.html>

A bugfix to allow macros in the exact mode and more clarification plus
test cases.

*   Code
    BUG FIX: allow macros if the exact mode is enabled.
    I completely forgot to compare pinfo with INSN_MACRO and now fixed.
*   Commit Message
    Even in the macros, it is clarified that instructions emitted by
    macros are still subject to the exact mode behavior if enabled.
*   Test Code
    New test cases (and small modification to li{32,64}.s) to test that:
    (1) Macros ("li" here) in the exact mode works as expected and
    (2) Automatic compression in the macro expansion is still suppressed
        li{32,64}.d: compression instructions are generated.
        exact-li{32,64}.d: only non-RVC instructions are generated.


Version 7 (2025-05-17)
=======================
Placeholder of ChangeLog in the commit message is removed.




Tsukasa OI (1):
  RISC-V: Support ".option [no]exact" assembler directives

 gas/config/tc-riscv.c                         |  40 +++-
 gas/doc/c-riscv.texi                          |  13 ++
 .../gas/riscv/exact-branch-extern-exact.d     |  32 ++++
 .../gas/riscv/exact-branch-extern-noexact.d   |  50 +++++
 gas/testsuite/gas/riscv/exact-branch-extern.s |  40 ++++
 .../gas/riscv/exact-branch-local-exact-fail.d |   3 +
 .../gas/riscv/exact-branch-local-exact-fail.l |  43 +++++
 .../gas/riscv/exact-branch-local-exact-ok.d   |  75 ++++++++
 .../gas/riscv/exact-branch-local-noexact.d    | 149 +++++++++++++++
 gas/testsuite/gas/riscv/exact-branch-local.s  | 138 ++++++++++++++
 gas/testsuite/gas/riscv/exact-li32.d          |  18 ++
 gas/testsuite/gas/riscv/exact-li64.d          |  45 +++++
 gas/testsuite/gas/riscv/exact.d               |  15 ++
 gas/testsuite/gas/riscv/exact.s               |  11 ++
 gas/testsuite/gas/riscv/li32.s                |   3 +
 gas/testsuite/gas/riscv/li64.s                |   3 +
 .../gas/riscv/no-relax-branch-offset-fail.l   |   5 +-
 .../gas/riscv/no-relax-branch-offset-fail.s   |  11 +-
 include/opcode/riscv.h                        |  14 ++
 opcodes/riscv-opc.c                           | 180 +++++++++---------
 20 files changed, 784 insertions(+), 104 deletions(-)
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-extern-exact.d
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-extern-noexact.d
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-extern.s
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-local-exact-fail.d
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-local-exact-fail.l
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-local-exact-ok.d
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-local-noexact.d
 create mode 100644 gas/testsuite/gas/riscv/exact-branch-local.s
 create mode 100644 gas/testsuite/gas/riscv/exact-li32.d
 create mode 100644 gas/testsuite/gas/riscv/exact-li64.d
 create mode 100644 gas/testsuite/gas/riscv/exact.d
 create mode 100644 gas/testsuite/gas/riscv/exact.s


base-commit: dbd830f14f791fa8d27afa08b258347b95608e57
-- 
2.43.0
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