[PATCH v2 03/15] MIPS: Improve WARN for $0 constraint on MIPSR6 branches

Jovan Dmitrovic jovan.dmitrovic@htecgroup.com
Wed Oct 29 14:09:25 GMT 2025
From: Matthew Fortune <matthew.fortune@imgtec.com>

Validation of warnings and error detection within branching
instructions for the MIPS R6 architecture. The test ensures that
the assembler generates accurate warnings when a user makes an
error involving the use of the $0 register in branching instructions,
thereby improving the reliability and correctness of binary outputs.

Signed-off-by: Matthew Fortune <matthew.fortune@mips.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Milica Matic <milica.matic@htecgroup.com>
Signed-off-by: Jovan Dmitrović <jovan.dmitrovic@htecgroup.com>

gas/ChangeLog:
	* testsuite/gas/mips/r6-branch-constraints.l: New file.
---
 .../gas/mips/r6-branch-constraints.l          | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 gas/testsuite/gas/mips/r6-branch-constraints.l

diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-branch-constraints.l
new file mode 100644
index 00000000000..3be2005f571
--- /dev/null
+++ b/gas/testsuite/gas/mips/r6-branch-constraints.l
@@ -0,0 +1,25 @@
+.*: Assembler messages:
+.*:2: Error: the source register must not be \$0 `blezc \$0,.'
+.*:3: Error: the source register must not be \$0 `bgezc \$0,.'
+.*:4: Error: the source register must not be \$0 `bgtzc \$0,.'
+.*:5: Error: the source register must not be \$0 `bltzc \$0,.'
+.*:6: Error: the source register must not be \$0 `beqzc \$0,.'
+.*:7: Error: the source register must not be \$0 `bnezc \$0,.'
+.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.'
+.*:9: Error: invalid operands `bgec \$2,\$0,.'
+.*:10: Error: invalid operands `bgec \$2,\$2,.'
+.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.'
+.*:12: Error: invalid operands `bgeuc \$2,\$0,.'
+.*:13: Error: invalid operands `bgeuc \$2,\$2,.'
+.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.'
+.*:15: Error: invalid operands `bltc \$2,\$0,.'
+.*:16: Error: invalid operands `bltc \$2,\$2,.'
+.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.'
+.*:18: Error: invalid operands `bltuc \$2,\$0,.'
+.*:19: Error: invalid operands `bltuc \$2,\$2,.'
+.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.'
+.*:21: Error: invalid operands `beqc \$2,\$0,.'
+.*:22: Error: invalid operands `beqc \$2,\$2,.'
+.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.'
+.*:24: Error: invalid operands `bnec \$2,\$0,.'
+.*:25: Error: invalid operands `bnec \$2,\$2,.'
\ No newline at end of file
-- 
2.34.1


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