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[PATCH v4] Add AMD znver6 processor support

Jiang, Haochen haochen.jiang@intel.com
Tue Nov 25 01:57:18 GMT 2025 
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, November 24, 2025 6:00 PM
> 
> On 21.11.2025 11:33, Umesh Kalvakuntla wrote:
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-avx512_bmm-bad.d
> > @@ -0,0 +1,16 @@
> > +#objdump: -dw
> > +#name: x86_64 AVX512_BMM BAD insn
> > +#source: x86-64-avx512_bmm-bad.s
> > +
> > +.*: +file format .*
> > +
> > +Disassembly of section \.text:
> > +
> > +[0-9a-f]+ <\.text>:
> > +[\s]*[a-f0-9]+:[\s]*62 f6 6c 08 80[\s]*\(bad\)
> > +[\s]*[a-f0-9]+:[\s]*d9 62 f6[\s]*fldenv -0xa\(%rdx\)
> > +[\s]*[a-f0-9]+:[\s]*ec[\s]*in     \(%dx\),%al
> > +[\s]*[a-f0-9]+:[\s]*08[\s]*\.byte 0x8
> > +[\s]*[a-f0-9]+:[\s]*80[\s]*\.byte 0x80
> > +[\s]*[a-f0-9]+:[\s]*d9[\s]*\.byte 0xd9
> > +#pass
> 
> This only really tests ...
> 
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-avx512_bmm-bad.s
> > @@ -0,0 +1,6 @@
> > +.text
> > +	#vbmacor16x16x16 %xmm1, %xmm2, %xmm3
> > +	.insn EVEX.128.NP.M6.W0 0x80, %xmm1, %xmm2, %xmm3
> 
> ... this, but not ...
> 
> > +	#vbmacxor16x16x16 %xmm1, %xmm2, %xmm3
> > +	.insn EVEX.128.NP.M6.W1 0x80, %xmm1, %xmm2, %xmm3
> 
> ... this. You will want to alter operands such that the ModR/M byte ends up as a
> single-byte opcode, such that the disassembler will properly recognize the insn
> boundary ahead of the 2nd insn under test. Further, the comments don't indicate
> what's being checked (i.e. what is deliberately wrong). Finally, please also
> indent .text by a tab. No directive should start in the very first column.
> 

I am with Jan here. Please add some comments indicating here we are testing
xmm is not a valid operand for vbmacxor16x16x16. It took me some seconds to
know why this is bad.

Thx,
Haochen
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