AMDScheduleBarrierMask | Modular
@register_passable(trivial)
struct AMDScheduleBarrierMask
Represents different instruction scheduling masks for AMDGPU scheduling instructions.
These masks control which types of instructions can be reordered across a barrier for performance optimization. When used with schedule_barrier(), the mask determines which instructions the compiler is allowed to move across the barrier point.
Implemented traits
AnyType,
Copyable,
Equatable,
ImplicitlyCopyable,
ImplicitlyDestructible,
Intable,
Movable,
RegisterPassable,
TrivialRegisterPassable
comptime members
__copy_ctor_is_trivial
comptime __copy_ctor_is_trivial = True
__del__is_trivial
comptime __del__is_trivial = True
__move_ctor_is_trivial
comptime __move_ctor_is_trivial = True
ALL_ALU
comptime ALL_ALU = AMDScheduleBarrierMask(1)
Allows reordering of all arithmetic and logic instructions that don't involve memory operations.
ALL_DS
comptime ALL_DS = AMDScheduleBarrierMask(128)
Permits reordering of all Local Data Share (LDS) operations.
ALL_VMEM
comptime ALL_VMEM = AMDScheduleBarrierMask(16)
Enables reordering of all vector memory operations (reads and writes).
DS_READ
comptime DS_READ = AMDScheduleBarrierMask(256)
Enables reordering of LDS read operations only.
DS_WRITE
comptime DS_WRITE = AMDScheduleBarrierMask(512)
Enables reordering of LDS write operations only.
MFMA
comptime MFMA = AMDScheduleBarrierMask(8)
Allows reordering of matrix multiplication and WMMA instructions.
NONE
comptime NONE = AMDScheduleBarrierMask(0)
No instructions can cross the barrier. Most restrictive option.
SALU
comptime SALU = AMDScheduleBarrierMask(4)
Permits reordering of scalar arithmetic/logic unit instructions only.
TRANS
comptime TRANS = AMDScheduleBarrierMask(1024)
Allows reordering of transcendental instructions (sin, cos, exp, etc).
VALU
comptime VALU = AMDScheduleBarrierMask(2)
Permits reordering of vector arithmetic/logic unit instructions only.
VMEM_READ
comptime VMEM_READ = AMDScheduleBarrierMask(32)
Allows reordering of vector memory read operations only.
VMEM_WRITE
comptime VMEM_WRITE = AMDScheduleBarrierMask(64)
Allows reordering of vector memory write operations only.
Methods
__init__
__init__(value: Int) -> Self
Initializes an AMDScheduleBarrierMask from an integer value.
This implicit constructor allows creating a barrier mask directly from an integer, which is useful for combining multiple mask flags using bitwise operations.
Args:
- value (
Int): The integer value to use for the barrier mask.
__eq__
__eq__(self, other: Self) -> Bool
Compares two AMDScheduleBarrierMask instances for equality.
Args:
- other (
Self): The otherAMDScheduleBarrierMaskto compare with.
Returns:
Bool: True if the masks have the same value, False otherwise.
__str__
__str__(self) -> String
Returns a string representation of the AMDScheduleBarrierMask.
Converts the mask to a human-readable string based on its value.
Returns:
String: A string representation of the mask, or aborts if the value is invalid.
__int__
__int__(self) -> Int
Converts the AMDScheduleBarrierMask to an integer.
Returns:
Int: The integer value of the mask, which can be used with low-level APIs.