RichardPar - Overview
Skip to content
Sign in
AI CODE CREATION
GitHub CopilotWrite better code with AI
GitHub SparkBuild and deploy intelligent apps
GitHub ModelsManage and compare prompts
MCP RegistryNewIntegrate external tools
View all features
Sign up
A bleeding-edge coder that likes the fine things in life... like source code
This SDRAM controller is for MT48LC32M16 SDRAM. This module was designed under the assumption that the clock rate is 100MHz.
Verilog 6 1
A Jetson Nano native implementation of the DOODS Object detector system.
C++ 4 2
MQTT to Serial adapter
C 1