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  1. Fixed Point Math Library for Verilog

    Verilog 147 44

  2. AXI DMA 32 / 64 bits

    Verilog 124 39

  4. Ethernet MAC 10/100 Mbps

    Verilog 85 40

  5. JPEG Encoder Verilog

    Verilog 81 36

  6. round robin arbiter

    Verilog 78 24

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Showing 10 of 768 repositories

  • sc2v Public

    SystemC to Verilog Synthesizable Subset Translator

    freecores/sc2v’s past year of commit activity

    C

    12

    GPL-2.0

    4 0 1

    Updated May 12, 2023

  • i2c Public

    I2C controller core

    freecores/i2c’s past year of commit activity

    Verilog

    49 38 2 2

    Updated Jan 1, 2023

  • freecores/jpegencode’s past year of commit activity

    Verilog

    81 36 2 0

    Updated Oct 31, 2022

  • xtea Public

    XTEA Crypto Core

    freecores/xtea’s past year of commit activity

    Verilog

    4

    LGPL-2.1 0

    0 0

    Updated Oct 31, 2022

  • des Public

    DES/Triple DES IP Cores

    freecores/des’s past year of commit activity

    Verilog

    4 2 0 0

    Updated Oct 30, 2022

  • freecores/aes_core’s past year of commit activity

    Verilog

    7 3 0 0

    Updated Oct 30, 2022

  • freecores/tiny_aes’s past year of commit activity

    Verilog

    15

    Apache-2.0

    7 0 0

    Updated Oct 4, 2022

  • embedded_risc Public

    Embedded 32-bit RISC uProcessor with SDRAM Controller

    freecores/embedded_risc’s past year of commit activity

    Verilog

    25 6 0 0

    Updated Sep 2, 2021

  • freecores/systemcmd5’s past year of commit activity

    C++

    5 5 0 0

    Updated May 14, 2021

  • mmu180 Public

    MMU for Z80 and eZ80

    freecores/mmu180’s past year of commit activity

    Verilog

    20 5 0 0

    Updated Mar 4, 2021

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