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1. Time to Digital Converter (TDC)

   VHDL 36 3

2. Forked from efabless/caravel_mpw-one

   Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

   Verilog 7

3. VHDL examples and tutorial based on GateMateA1-EVB board

   VHDL 7 1

6. Forked from OSVVM/OSVVM

   Open Source VHDL Verification Methodology (OSVVM) Repository

   VHDL 1